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Message-ID: <20150727122758.GU2564@lukather>
Date: Mon, 27 Jul 2015 14:27:58 +0200
From: Maxime Ripard <maxime.ripard@...e-electrons.com>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Hans de Goede <hdegoede@...hat.com>, Chen-Yu Tsai <wens@...e.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH 3/4] pinctrl: sunxi: Add custom irq_domain_ops
On Mon, Jul 27, 2015 at 02:04:38PM +0200, Linus Walleij wrote:
> On Mon, Jul 20, 2015 at 2:41 PM, Maxime Ripard
> <maxime.ripard@...e-electrons.com> wrote:
>
> > The current interrupt parsing code was working by accident, because the
> > default was actually parsing the first node of interrupts.
> >
> > While that was mostly working (and the flags were actually ignored), this
> > binding has never been documented, and doesn't work with SoCs that have
> > multiple interrupt banks anyway.
> >
> > Add a proper interrupt xlate function, that uses the same description than
> > the GPIOs (<bank> <pin> <flags>), that will make things less confusing.
> >
> > The EINT number will still be used as the hwirq number, but won't be
> > exposed through the DT.
> >
> > Signed-off-by: Maxime Ripard <maxime.ripard@...e-electrons.com>
>
> This patch does not apply to the pinctrl devel branch.
>
> Does it need to be rebased or do I need to merge in fixes?
>
> Holding patch 3/4 and 4/4 until this is resolved.
I'll rebase and resend the last 2 patches.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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