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Message-ID: <20150728171013.58cbc608@bbrezillon>
Date:	Tue, 28 Jul 2015 17:10:13 +0200
From:	Boris Brezillon <boris.brezillon@...e-electrons.com>
To:	Hans de Goede <hdegoede@...hat.com>
Cc:	Michal Suchanek <hramrach@...il.com>,
	David Woodhouse <dwmw2@...radead.org>,
	Brian Norris <computersforpeace@...il.com>,
	Petros Angelatos <petrosagg@...il.com>,
	linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/2] New NAND chip IDs

Hi Hans,

On Tue, 28 Jul 2015 16:49:58 +0200
Hans de Goede <hdegoede@...hat.com> wrote:

> Hi,
> 
> On 07/28/2015 04:29 PM, Michal Suchanek wrote:
> > Hello,
> >
> > the NAND chips on Cubietech boards are not known to Linux.
> >
> > I used Petros Angelatos' patch from sunxi experimental tree for one chip and
> > added another chip.
> >
> > I hope it's ok to send both patches to avoid merge conflict.
> 
> I do not think that these patches are a good idea, this will lead to an
> ever growing manual maintained list of ids, and that is not maintainable
> IMHO.
> 
> For Samsung chips we only need the ecc strength and size the rest is already
> detected on the fly, and I've a patch in my personal tree to get the
> ecc strengt and size from the nand without needing to have an entry per
> chip:
> 
> https://github.com/jwrdegoede/linux-sunxi/commit/53b335d33232753b7aa70298009158baadf5a6bf
> 
> This is IMHO a much better solution.

Hm, IMHO it's not: the nand ids table also store information about
supported NAND timings, and maybe we'll have to add new things (like
the read-retry implementation to use for a specific chip).

Moreover, this information can be automatically deduced from the NAND
id, and we try to keep discoverable info out of the DT.

I agree that keeping a list of full IDs is not ideal, but it's far
better than having to duplicate this information in all the board DTs
using a given NAND chip.

Best Regards,

Boris

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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