linux-kernel - Re: [PATCH 7/9] x86/intel_rdt: Implement scheduling support for Intel RDT

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Message-ID: <alpine.DEB.2.10.1507301112200.921@vshiva-Udesk>
Date:	Thu, 30 Jul 2015 11:16:50 -0700 (PDT)
From:	Vikas Shivappa <vikas.shivappa@...el.com>
To:	Peter Zijlstra <peterz@...radead.org>
cc:	Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
	linux-kernel@...r.kernel.org, vikas.shivappa@...el.com,
	x86@...nel.org, hpa@...or.com, tglx@...utronix.de,
	mingo@...nel.org, tj@...nel.org, matt.fleming@...el.com,
	will.auld@...el.com, glenn.p.williamson@...el.com,
	kanaka.d.juvva@...el.com
Subject: Re: [PATCH 7/9] x86/intel_rdt: Implement scheduling support for
 Intel RDT



On Wed, 29 Jul 2015, Peter Zijlstra wrote:

> On Wed, Jul 01, 2015 at 03:21:08PM -0700, Vikas Shivappa wrote:
>> diff --git a/arch/x86/include/asm/intel_rdt.h b/arch/x86/include/asm/intel_rdt.h
>> index 3ad426c..78df3d7 100644
>> --- a/arch/x86/include/asm/intel_rdt.h
>> +++ b/arch/x86/include/asm/intel_rdt.h
>> @@ -4,10 +4,16 @@
>>  #ifdef CONFIG_CGROUP_RDT
>>
>>  #include <linux/cgroup.h>
>> +#include <asm/rdt_common.h>
>> +
>>  #define MAX_CBM_LENGTH			32
>>  #define IA32_L3_CBM_BASE		0xc90
>>  #define CBM_FROM_INDEX(x)		(IA32_L3_CBM_BASE + x)
>>
>> +DECLARE_PER_CPU(struct intel_pqr_state, pqr_state);
>
> You don't think this should be in rdt_common.h ?

Sounds good.

>
>> diff --git a/arch/x86/include/asm/rdt_common.h b/arch/x86/include/asm/rdt_common.h
>> new file mode 100644
>> index 0000000..01502c5
>> --- /dev/null
>> +++ b/arch/x86/include/asm/rdt_common.h
>> @@ -0,0 +1,25 @@
>> +#ifndef _X86_RDT_H_
>> +#define _X86_RDT_H_
>> +
>> +#define MSR_IA32_PQR_ASSOC	0x0c8f
>> +
>> +/**
>> + * struct intel_pqr_state - State cache for the PQR MSR
>> + * @rmid:		The cached Resource Monitoring ID
>> + * @closid:		The cached Class Of Service ID
>> + * @rmid_usecnt:	The usage counter for rmid
>> + *
>> + * The upper 32 bits of MSR_IA32_PQR_ASSOC contain closid and the
>> + * lower 10 bits rmid. The update to MSR_IA32_PQR_ASSOC always
>> + * contains both parts, so we need to cache them.
>> + *
>> + * The cache also helps to avoid pointless updates if the value does
>> + * not change.
>> + */
>> +struct intel_pqr_state {
>> +	u32			rmid;
>> +	u32			closid;
>> +	int			rmid_usecnt;
>> +};
>> +
>> +#endif
>
> So why not call this file PQR something or other? That's all there is.

Well , had this to have things common between the cqm code and the other code. I 
see right now we dont put anything else here other than pqr.
Will fix this now and change this later to rdt_common when i add more thigs in 
really then.

>
>> diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
>> index 751bf4b..9149577 100644
>> --- a/arch/x86/include/asm/switch_to.h
>> +++ b/arch/x86/include/asm/switch_to.h
>> @@ -8,6 +8,9 @@ struct tss_struct;
>>  void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
>>  		      struct tss_struct *tss);
>>
>> +#include <asm/intel_rdt.h>
>> +#define finish_arch_switch(prev)	intel_rdt_sched_in()
>
> Right, so please stuff that in __switch_to(),

will fix.

I think I can kill
> finish_arch_switch() entirely.
>

what about other architectures using them ?
Thanks,
Vikas

>
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