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Message-ID: <55BB8412.2000905@ti.com>
Date: Fri, 31 Jul 2015 10:20:02 -0400
From: Murali Karicheri <m-karicheri2@...com>
To: <robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
<ssantosh@...nel.org>, <mturquette@...aro.org>,
<sboyd@...eaurora.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux@....linux.org.uk>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 2/2] ARM: dts: keystone: fix dt bindings to use post div
register for mainpll
On 05/29/2015 12:04 PM, Murali Karicheri wrote:
> All of the keystone devices have a separate register to hold post
> divider value for main pll clock. Currently the fixed-postdiv
> value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to
> use a value of 2 for this. Now that we have fixed this in the pll
> clock driver change the dt bindings for the same.
>
> Signed-off-by: Murali Karicheri <m-karicheri2@...com>
> ---
> arch/arm/boot/dts/k2e-clocks.dtsi | 5 ++---
> arch/arm/boot/dts/k2hk-clocks.dtsi | 5 ++---
> arch/arm/boot/dts/k2l-clocks.dtsi | 5 ++---
> 3 files changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm/boot/dts/k2e-clocks.dtsi b/arch/arm/boot/dts/k2e-clocks.dtsi
> index 4773d6a..d56d68f 100644
> --- a/arch/arm/boot/dts/k2e-clocks.dtsi
> +++ b/arch/arm/boot/dts/k2e-clocks.dtsi
> @@ -13,9 +13,8 @@ clocks {
> #clock-cells = <0>;
> compatible = "ti,keystone,main-pll-clock";
> clocks = <&refclksys>;
> - reg = <0x02620350 4>, <0x02310110 4>;
> - reg-names = "control", "multiplier";
> - fixed-postdiv = <2>;
> + reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
> + reg-names = "control", "multiplier", "post-divider";
> };
>
> papllclk: papllclk@...0358 {
> diff --git a/arch/arm/boot/dts/k2hk-clocks.dtsi b/arch/arm/boot/dts/k2hk-clocks.dtsi
> index d5adee3..af9b719 100644
> --- a/arch/arm/boot/dts/k2hk-clocks.dtsi
> +++ b/arch/arm/boot/dts/k2hk-clocks.dtsi
> @@ -22,9 +22,8 @@ clocks {
> #clock-cells = <0>;
> compatible = "ti,keystone,main-pll-clock";
> clocks = <&refclksys>;
> - reg = <0x02620350 4>, <0x02310110 4>;
> - reg-names = "control", "multiplier";
> - fixed-postdiv = <2>;
> + reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
> + reg-names = "control", "multiplier", "post-divider";
> };
>
> papllclk: papllclk@...0358 {
> diff --git a/arch/arm/boot/dts/k2l-clocks.dtsi b/arch/arm/boot/dts/k2l-clocks.dtsi
> index eb1e3e2..ef8464b 100644
> --- a/arch/arm/boot/dts/k2l-clocks.dtsi
> +++ b/arch/arm/boot/dts/k2l-clocks.dtsi
> @@ -22,9 +22,8 @@ clocks {
> #clock-cells = <0>;
> compatible = "ti,keystone,main-pll-clock";
> clocks = <&refclksys>;
> - reg = <0x02620350 4>, <0x02310110 4>;
> - reg-names = "control", "multiplier";
> - fixed-postdiv = <2>;
> + reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
> + reg-names = "control", "multiplier", "post-divider";
> };
>
> papllclk: papllclk@...0358 {
>
Santosh,
The clk driver update is already merged to v4.2-rc. Could you send this
DT update as well for 4.2-rc?
Murali
--
Murali Karicheri
Linux Kernel, Keystone
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