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Message-ID: <55886CDE.7090906@ti.com>
Date:	Mon, 22 Jun 2015 16:15:26 -0400
From:	Murali Karicheri <m-karicheri2@...com>
To:	santosh shilimkar <santosh.shilimkar@...cle.com>,
	Michael Turquette <mturquette@...aro.org>,
	<robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
	<ssantosh@...nel.org>, <sboyd@...eaurora.org>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-clk@...r.kernel.org>, <linux@....linux.org.uk>,
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 1/2] clk: keystone: add support for post divider register
 for main pll

On 06/18/2015 06:55 PM, santosh shilimkar wrote:
> On 6/18/2015 3:37 PM, Michael Turquette wrote:
>> Quoting Murali Karicheri (2015-05-29 09:04:12)
>>> Main PLL controller has post divider bits in a separate register in
>>> pll controller. Use the value from this register instead of fixed
>>> divider when available.
>>>
>>> Signed-off-by: Murali Karicheri <m-karicheri2@...com>
>>
>> Applied to clk-next.
>>
> Thanks Mike !!
>
>
Thanks Mike.

Regards,

-- 
Murali Karicheri
Linux Kernel, Keystone

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