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Message-ID: <55834C64.6020703@oracle.com>
Date: Thu, 18 Jun 2015 15:55:32 -0700
From: santosh shilimkar <santosh.shilimkar@...cle.com>
To: Michael Turquette <mturquette@...aro.org>,
Murali Karicheri <m-karicheri2@...com>, robh+dt@...nel.org,
pawel.moll@....com, mark.rutland@....com,
ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
ssantosh@...nel.org, sboyd@...eaurora.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, linux@....linux.org.uk,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/2] clk: keystone: add support for post divider register
for main pll
On 6/18/2015 3:37 PM, Michael Turquette wrote:
> Quoting Murali Karicheri (2015-05-29 09:04:12)
>> Main PLL controller has post divider bits in a separate register in
>> pll controller. Use the value from this register instead of fixed
>> divider when available.
>>
>> Signed-off-by: Murali Karicheri <m-karicheri2@...com>
>
> Applied to clk-next.
>
Thanks Mike !!
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