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Message-ID: <55C0DDA0.1020304@ti.com>
Date: Tue, 4 Aug 2015 21:13:28 +0530
From: Kishon Vijay Abraham I <kishon@...com>
To: Tony Lindgren <tony@...mide.com>, Roger Quadros <rogerq@...com>
CC: <nm@...com>, <nsekhar@...com>, <balbi@...com>,
<grygorii.strashko@...com>, <t-kristo@...com>,
<linux-omap@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to
SATA PHY
On Tuesday 04 August 2015 02:11 PM, Tony Lindgren wrote:
> * Roger Quadros <rogerq@...com> [150804 01:22]:
>> Tony,
>>
>> On 17/07/15 16:47, Roger Quadros wrote:
>>> This register is required to be passed to the SATA PHY driver
>>> to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).
>>>
>>> Signed-off-by: Roger Quadros <rogerq@...com>
>>
>> Can you please Ack or pick this for -fixes.
>> Kishon has already picked patch 1 in this series. Thanks.
>
> Best that Kishon takes both then:
>
> Acked-by: Tony Lindgren <tony@...mide.com>
merged, thanks.
-Kishon
>
>>> ---
>>> arch/arm/boot/dts/dra7.dtsi | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
>>> index 8f1e25b..4a0718c 100644
>>> --- a/arch/arm/boot/dts/dra7.dtsi
>>> +++ b/arch/arm/boot/dts/dra7.dtsi
>>> @@ -1140,6 +1140,7 @@
>>> ctrl-module = <&omap_control_sata>;
>>> clocks = <&sys_clkin1>, <&sata_ref_clk>;
>>> clock-names = "sysclk", "refclk";
>>> + syscon-pllreset = <&scm_conf 0x3fc>;
>>> #phy-cells = <0>;
>>> };
>>>
>>>
--
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