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Message-ID: <1438792778-7586-1-git-send-email-b20788@freescale.com>
Date: Thu, 6 Aug 2015 00:39:38 +0800
From: Anson Huang <b20788@...escale.com>
To: <linux-kernel@...r.kernel.org>
CC: <tglx@...utronix.de>, <jason@...edaemon.net>,
<marc.zyngier@....com>, <rmk+kernel@....linux.org.uk>
Subject: [PATCH] irqchip/gic: restore global interrupts group settings in distributor
In GIC's distributor initializtion, all global interrupts
are set to group 1, however, after suspend/resume with
ARM/GIC power off/on, distributor does NOT restore
these global interrupts group setting, it will cause
system fail to resume.
This patch adds global interrupts group setting restore
for distributor.
Signed-off-by: Anson Huang <b20788@...escale.com>
---
drivers/irqchip/irq-gic.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index a530d9a..c8fa6ee 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -532,6 +532,16 @@ static void gic_dist_restore(unsigned int gic_nr)
writel_relaxed(gic_data[gic_nr].saved_spi_enable[i],
dist_base + GIC_DIST_ENABLE_SET + i * 4);
+ writel_relaxed(GICD_ENABLE_GRP1, dist_base + GIC_DIST_CTRL);
+
+ /*
+ * Optionally set all global interrupts to be group 1.
+ */
+ if (readl_relaxed(dist_base + GIC_DIST_CTRL) & GICD_ENABLE_GRP1) {
+ for (i = 32; i < gic_irqs; i += 32)
+ writel_relaxed(0xffffffff, dist_base + GIC_DIST_IGROUP + i * 4 / 32);
+ }
+
writel_relaxed(GICD_ENABLE | GICD_ENABLE_GRP1, dist_base + GIC_DIST_CTRL);
}
--
1.9.1
--
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