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Message-ID: <37D7C6CF3E00A74B8858931C1DB2F077018D3373@SHSMSX103.ccr.corp.intel.com>
Date:	Thu, 6 Aug 2015 19:25:56 +0000
From:	"Liang, Kan" <kan.liang@...el.com>
To:	Stephane Eranian <eranian@...gle.com>
CC:	Peter Zijlstra <peterz@...radead.org>,
	"mingo@...hat.com" <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	"ak@...ux.intel.com" <ak@...ux.intel.com>,
	LKML <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH V2 1/1] perf/x86: Add Intel power cstate PMUs support


> 
> On Thu, Aug 6, 2015 at 11:52 AM, Liang, Kan <kan.liang@...el.com> wrote:
> >
> >
> >> >> +static cpumask_t power_cstate_core_cpu_mask;
> >> >
> >> > That one typically does not need a cpumask.
> >> >
> >> You need to pick one CPU out of the multi-core. But it is for client
> >> parts thus there is only one socket. At least this is my understanding.
> >>
> >
> > CORE_C*_RESIDENCY are available for physical processor core.
> > So logical processor in same physical processor core share the same
> > counter.
> > I think we need the cpumask to identify the default logical processor
> > which do counting.
> >
> Did you restrict these events to system-wide mode only?
>
 
Yes

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