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Message-ID: <CABPqkBQ=muoC-THVkYZm4Q4B2mj8jX8KZKSyawjmk7fvFXcknA@mail.gmail.com>
Date:	Thu, 6 Aug 2015 13:16:08 -0700
From:	Stephane Eranian <eranian@...gle.com>
To:	"Liang, Kan" <kan.liang@...el.com>
Cc:	Peter Zijlstra <peterz@...radead.org>,
	"mingo@...hat.com" <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	"ak@...ux.intel.com" <ak@...ux.intel.com>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2 1/1] perf/x86: Add Intel power cstate PMUs support

On Thu, Aug 6, 2015 at 12:25 PM, Liang, Kan <kan.liang@...el.com> wrote:
>
>>
>> On Thu, Aug 6, 2015 at 11:52 AM, Liang, Kan <kan.liang@...el.com> wrote:
>> >
>> >
>> >> >> +static cpumask_t power_cstate_core_cpu_mask;
>> >> >
>> >> > That one typically does not need a cpumask.
>> >> >
>> >> You need to pick one CPU out of the multi-core. But it is for client
>> >> parts thus there is only one socket. At least this is my understanding.
>> >>
>> >
>> > CORE_C*_RESIDENCY are available for physical processor core.
>> > So logical processor in same physical processor core share the same
>> > counter.
>> > I think we need the cpumask to identify the default logical processor
>> > which do counting.
>> >
>> Did you restrict these events to system-wide mode only?
>>
Ok, so that means that your cpumask includes one HT per physical core. But then,
the result is not the simple aggregation of all the N/2 CPUs.
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