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Message-ID: <20150811141229.GB13920@saruman.tx.rr.com>
Date: Tue, 11 Aug 2015 09:12:29 -0500
From: Felipe Balbi <balbi@...com>
To: Yunzhi Li <lyz@...k-chips.com>
CC: <jwerner@...omium.org>, <dianders@...omium.org>,
<huangtao@...k-chips.com>, <cf@...k-chips.com>,
<hl@...k-chips.com>, <linux-rockchip@...ts.infradead.org>,
John Youn <johnyoun@...opsys.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
<linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1] usb: dwc2: reset AHB hclk domain before init
Hi,
On Tue, Aug 11, 2015 at 10:27:42AM +0800, Yunzhi Li wrote:
> We initiate dwc2 usb controller in BIOS, when kernel driver
> start-up we should reset AHB hclk domain to reset all AHB
> interface registers to default. Without this the FIFO value
> setting might be incorrect because calculating FIFO size need the
> power-on value of GRXFSIZ/GNPTXFSIZ/HPTXFSIZ registers.
>
> This patch could avoid warnning massage like in rk3288 platform:
> [ 2.074764] dwc2 ff580000.usb: 256 invalid for
> host_perio_tx_fifo_size. Check HW configuration.
>
> Signed-off-by: Yunzhi Li <lyz@...k-chips.com>
>
> ---
>
> drivers/usb/dwc2/platform.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index 9093530..3da21ab 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -42,6 +42,7 @@
> #include <linux/of_device.h>
> #include <linux/mutex.h>
> #include <linux/platform_device.h>
> +#include <linux/reset.h>
>
> #include <linux/usb/of.h>
>
> @@ -165,6 +166,7 @@ static int dwc2_driver_probe(struct platform_device *dev)
> struct resource *res;
> struct phy *phy;
> struct usb_phy *uphy;
> + struct reset_control *rst;
> int retval;
> int irq;
>
> @@ -189,6 +191,16 @@ static int dwc2_driver_probe(struct platform_device *dev)
>
> hsotg->dev = &dev->dev;
>
> + /* AHB hclk domain reset, set all AHB interface registers to default */
> + rst = devm_reset_control_get_optional(&dev->dev, "ahb_reset");
why isn't this done in core so PCI systems can also make use of it ?
--
balbi
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