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Message-ID: <55CD25B6.6050901@codeaurora.org>
Date:	Thu, 13 Aug 2015 16:18:14 -0700
From:	Stephen Boyd <sboyd@...eaurora.org>
To:	Mathieu Olivari <mathieu@...eaurora.org>
CC:	robh+dt@...nel.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	linux@....linux.org.uk, dwmw2@...radead.org,
	computersforpeace@...il.com, agross@...eaurora.org,
	bjorn.andersson@...ymobile.com, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	linux-mtd@...ts.infradead.org
Subject: Re: [PATCH 1/3] ARM: qcom: add SFPB nodes to IPQ806x dts

On 08/13/2015 02:33 PM, Mathieu Olivari wrote:
> Add one new node to the ipq806x.dtsi file to declare & register the
> hardware spinlock devices. This mechanism is required to be used by
> other drivers such as SMEM.
>
> Signed-off-by: Mathieu Olivari <mathieu@...eaurora.org>
> ---
>   arch/arm/boot/dts/qcom-ipq8064.dtsi | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> index 9f727d8..ea7b959 100644
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> @@ -67,6 +67,18 @@
>   			clock-frequency = <32768>;
>   			#clock-cells = <0>;
>   		};
> +
> +		sfpb_mutex_block: syscon@...00600 {

I think you can drop the leading 0 here. Also this should be moved into 
the soc node.

> +			compatible = "syscon";
> +			reg = <0x01200600 0x100>;
> +		};
> +
> +		sfpb_mutex: sfpb-mutex {
> +			compatible = "qcom,sfpb-mutex";
> +			syscon = <&sfpb_mutex_block 4 4>;
> +
> +			#hwlock-cells = <1>;
> +		};

And this node should be moved to the root /.
>   	};
>   
>   	soc: soc {


-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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