linux-kernel - Re: [PATCH 29/31] parisc: handle page-less SG entries

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Message-ID: <CAA9_cmcNA__N_yVTKsEqLAKBuoL-hx73t6opdsmb7w-0qKXaWg@mail.gmail.com>
Date:	Thu, 13 Aug 2015 20:30:49 -0700
From:	Dan Williams <dan.j.williams@...el.com>
To:	Christoph Hellwig <hch@....de>
Cc:	Linus Torvalds <torvalds@...ux-foundation.org>,
	linux-mips <linux-mips@...ux-mips.org>,
	"linux-ia64@...r.kernel.org" <linux-ia64@...r.kernel.org>,
	"linux-nvdimm@...ts.01.org" <linux-nvdimm@...1.01.org>,
	David Howells <dhowells@...hat.com>,
	sparclinux@...r.kernel.org,
	Hans-Christian Egtvedt <egtvedt@...fundet.no>,
	"linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
	linux-s390 <linux-s390@...r.kernel.org>,
	"the arch/x86 maintainers" <x86@...nel.org>,
	David Woodhouse <dwmw2@...radead.org>,
	Håvard Skinnemoen <hskinnemoen@...il.com>,
	linux-xtensa@...ux-xtensa.org, grundler@...isc-linux.org,
	Miao Steven <realmz6@...il.com>,
	Alex Williamson <alex.williamson@...hat.com>,
	linux-metag@...r.kernel.org, Jens Axboe <axboe@...nel.dk>,
	Michal Simek <monstr@...str.eu>,
	Parisc List <linux-parisc@...r.kernel.org>,
	Vineet Gupta <vgupta@...opsys.com>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	linux-alpha@...r.kernel.org,
	Linux Media Mailing List <linux-media@...r.kernel.org>,
	ppc-dev <linuxppc-dev@...ts.ozlabs.org>
Subject: Re: [PATCH 29/31] parisc: handle page-less SG entries

On Thu, Aug 13, 2015 at 7:31 AM, Christoph Hellwig <hch@....de> wrote:
> On Wed, Aug 12, 2015 at 09:01:02AM -0700, Linus Torvalds wrote:
>> I'm assuming that anybody who wants to use the page-less
>> scatter-gather lists always does so on memory that isn't actually
>> virtually mapped at all, or only does so on sane architectures that
>> are cache coherent at a physical level, but I'd like that assumption
>> *documented* somewhere.
>
> It's temporarily mapped by kmap-like helpers.  That code isn't in
> this series. The most recent version of it is here:
>
> https://git.kernel.org/cgit/linux/kernel/git/djbw/nvdimm.git/commit/?h=pfn&id=de8237c99fdb4352be2193f3a7610e902b9bb2f0
>
> note that it's not doing the cache flushing it would have to do yet, but
> it's also only enabled for x86 at the moment.

For virtually tagged caches I assume we would temporarily map with
kmap_atomic_pfn_t(), similar to how drm_clflush_pages() implements
powerpc support.  However with DAX we could end up with multiple
virtual aliases for a page-less pfn.
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