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Message-ID: <alpine.DEB.2.11.1508281849510.15006@nanos>
Date:	Fri, 28 Aug 2015 18:54:57 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Keith Busch <keith.busch@...el.com>
cc:	x86@...nel.org, LKML <linux-kernel@...r.kernel.org>,
	Bryan Veal <bryan.e.veal@...el.com>,
	Dan Williams <dan.j.williams@...el.com>,
	linux-pci@...r.kernel.org, Jiang Liu <jiang.liu@...ux.intel.com>
Subject: Re: [RFC PATCH 1/2] x86: PCI bus specific MSI operations

On Thu, 27 Aug 2015, Keith Busch wrote:

> This patch adds struct x86_msi_ops to x86's PCI sysdata. This gives a
> host bridge driver the option to provide alternate MSI Data Register
> and MSI-X Table Entry programming for devices in PCI domains that do
> not subscribe to usual "IOAPIC" format.

I'm not too fond about more ad hoc indirection and special casing. We
should be able to handle this with hierarchical irq domains. Jiang
might have an idea how to do that for your case.

Thanks,

	tglx
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