linux-kernel - Re: [RFC PATCH 1/2] x86: PCI bus specific MSI operations

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Message-ID: <alpine.LNX.2.00.1508282044490.3969@localhost.lm.intel.com>
Date:	Fri, 28 Aug 2015 21:39:49 +0000 (UTC)
From:	Keith Busch <keith.busch@...el.com>
To:	Thomas Gleixner <tglx@...utronix.de>
cc:	Keith Busch <keith.busch@...el.com>, x86@...nel.org,
	LKML <linux-kernel@...r.kernel.org>,
	Bryan Veal <bryan.e.veal@...el.com>,
	Dan Williams <dan.j.williams@...el.com>,
	linux-pci@...r.kernel.org, Jiang Liu <jiang.liu@...ux.intel.com>
Subject: Re: [RFC PATCH 1/2] x86: PCI bus specific MSI operations

On Fri, 28 Aug 2015, Thomas Gleixner wrote:
> On Thu, 27 Aug 2015, Keith Busch wrote:
>
>> This patch adds struct x86_msi_ops to x86's PCI sysdata. This gives a
>> host bridge driver the option to provide alternate MSI Data Register
>> and MSI-X Table Entry programming for devices in PCI domains that do
>> not subscribe to usual "IOAPIC" format.
>
> I'm not too fond about more ad hoc indirection and special casing. We
> should be able to handle this with hierarchical irq domains. Jiang
> might have an idea how to do that for your case.

Thank you for the suggestion, I will take a closer look at this again. All
the better if we don't require an arch specific dependency.

I asked Jiang about domain hierarchies a few weeks ago and understood
these are suited for irq controllers, but the VMD device is an aggregator.

Here's a little more h/w info in case it helps steer me in the right
direction: VMD muxes all the device interrupts in its PCI domain into
one of several VMD h/w irqs. The VMD driver then has to de-mux that into
CPU side irqs for each device.
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