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Message-ID: <4887557.26yiVA9gU0@tauon.atsec.com>
Date: Fri, 11 Sep 2015 00:52:20 +0200
From: Stephan Mueller <smueller@...onox.de>
To: Tim Chen <tim.c.chen@...ux.intel.com>
Cc: Herbert Xu <herbert@...dor.apana.org.au>,
"H. Peter Anvin" <hpa@...or.com>,
"David S.Miller" <davem@...emloft.net>,
Sean Gulley <sean.m.gulley@...el.com>,
Chandramouli Narayanan <mouli_7982@...oo.com>,
Vinodh Gopal <vinodh.gopal@...el.com>,
James Guilford <james.guilford@...el.com>,
Wajdi Feghali <wajdi.k.feghali@...el.com>,
Jussi Kivilinna <jussi.kivilinna@....fi>,
linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/4] crypto: [sha] glue code for Intel SHA extensions optimized SHA1 & SHA256
Am Donnerstag, 10. September 2015, 15:27:20 schrieb Tim Chen:
Hi Tim,
>This patch adds the glue code to detect and utilize the Intel SHA
>extensions optimized SHA1 and SHA256 update transforms when available.
>
>This code has been tested on Broxton for functionality.
A general comment on this file: shouldn't this file be cleaned and use the
standard mechanisms of the kernel crypto API?
This glue implements its own selection of which SHA implementation to use. But
the kernel crypto API implements that logic already. The issue with the
current implementation in this file is that you have no clue which particular
implementation of SHA is in use in one particular case.
So, may I suggest a restructuring to define independent instances of SHA, such
as
- cra_name == "sha1", cra_driver_name="sha1_ssse3", cra_priority=300
- cra_name == "sha1", cra_driver_name="sha1_avx", cra_priority=400
- cra_name == "sha1", cra_driver_name="sha1_avx2", cra_priority=500
- cra_name == "sha1", cra_driver_name="sha1_shavx", cra_priority=600
Similarly for the other SHAs?
In all the register functions for the ciphers, you can bail out if the
hardware does not support an implementation.
Ciao
Stephan
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