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Message-Id: <20150910.155606.944423642222505007.davem@davemloft.net>
Date: Thu, 10 Sep 2015 15:56:06 -0700 (PDT)
From: David Miller <davem@...emloft.net>
To: tim.c.chen@...ux.intel.com
Cc: herbert@...dor.apana.org.au, hpa@...or.com,
sean.m.gulley@...el.com, mouli_7982@...oo.com,
vinodh.gopal@...el.com, james.guilford@...el.com,
wajdi.k.feghali@...el.com, jussi.kivilinna@....fi,
linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/4] crypto: [sha] x86 SHA extension optimization of
SHA1 and SHA256
From: Tim Chen <tim.c.chen@...ux.intel.com>
Date: Thu, 10 Sep 2015 15:26:52 -0700
>
> The new x86 SHA extensions provide new hardware accelerated instructions
> for computing SHA1 and SHA256 hashes. This patch series provide the
> assembly routines for SHA1 and SHA256 computation using these new
> instructions to the kernel crypto library. For 4K data blocks, we've
> seen up to 3.6x speedup over existing SSSE3 enhanced routines in the
> kernel crypto library on Broxton platform.
>
> Refer to SHA extension programming guide in chapter 8.2 of the
> Intel Architecture Instruction Set Extensions Programming reference.
> https://software.intel.com/sites/default/files/managed/07/b7/319433-023.pdf
>
> Pre-req patches:
> [1] [PATCH] sha: Enable cpuid check for Intel SHA extensions implementations
> http://marc.info/?l=linux-kernel&m=144019424304089&w=2
> [2] [Patch] x86/insn: perf tools: Add new SHA instructions
> http://marc.info/?l=linux-kernel&m=144119645000679&w=2
Series looks fine to me:
Acked-by: David S. Miller <davem@...emloft.net>
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