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Message-ID: <1442286145.29883.8.camel@decadent.org.uk>
Date:	Tue, 15 Sep 2015 04:02:25 +0100
From:	Ben Hutchings <ben@...adent.org.uk>
To:	Willy Tarreau <w@....eu>
Cc:	linux-kernel@...r.kernel.org, stable@...r.kernel.org,
	Ralf Baechle <ralf@...ux-mips.org>
Subject: Re: [PATCH 2.6.32 35/62] MIPS: Fix cpu_has_mips_r2_exec_hazard.

On Sun, 2015-09-13 at 00:56 +0200, Willy Tarreau wrote:
> 2.6.32-longterm review patch.  If anyone has any objections, please let me know.
> 
> ------------------
> 
> From: Ralf Baechle <ralf@...ux-mips.org>
> 
> commit 9cdf30bd3bac697fc533988f44a117434a858f69 upstream.
> 
> Returns a non-zero value if the current processor implementation requires
> an IHB instruction to deal with an instruction hazard as per MIPS R2
> architecture specification, zero otherwise.
> 
> For a discussion, see http://patchwork.linux-mips.org/patch/9539/.
> 
> Signed-off-by: Ralf Baechle <ralf@...ux-mips.org>
> [bwh: Backported to 3.2: trim the CPU type list]
> Signed-off-by: Ben Hutchings <ben@...adent.org.uk>
> (cherry picked from commit 8feb2a714b3478b2cde5c576fd9f47ef44b60e8d)
> 
> Signed-off-by: Willy Tarreau <w@....eu>
> ---
>  arch/mips/include/asm/cpu-features.h | 26 +++++++++++++++++++++++++-
>  1 file changed, 25 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
> index 1f4df64..a3dbb59 100644
> --- a/arch/mips/include/asm/cpu-features.h
> +++ b/arch/mips/include/asm/cpu-features.h
> @@ -150,8 +150,32 @@
>  #define cpu_has_mips_r	(cpu_has_mips32r1 | cpu_has_mips32r2 | \
>  			 cpu_has_mips64r1 | cpu_has_mips64r2)
>  
> +/*
> + * cpu_has_mips_r2_exec_hazard - return if IHB is required on current processor
> + *
> + * Returns non-zero value if the current processor implementation requires
> + * an IHB instruction to deal with an instruction hazard as per MIPS R2
> + * architecture specification, zero otherwise.
> + */
>  #ifndef cpu_has_mips_r2_exec_hazard
> -#define cpu_has_mips_r2_exec_hazard cpu_has_mips_r2
> +#define cpu_has_mips_r2_exec_hazard					\
> +({									\
> +	int __res;							\
> +									\
> +	switch (current_cpu_type()) {					\
> +	case CPU_74K:							\
> +	case CPU_CAVIUM_OCTEON:						\
> +	case CPU_CAVIUM_OCTEON_PLUS:					\
> +	case CPU_CAVIUM_OCTEON2:					\
[...]

These last two constants aren't defined in 2.6.32, so they would need to
be removed too.  But I don't think this is needed at all.

Ben.


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