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Message-ID: <1442946551-27893-1-git-send-email-paul.burton@imgtec.com>
Date:	Tue, 22 Sep 2015 11:29:08 -0700
From:	Paul Burton <paul.burton@...tec.com>
To:	<linux-mips@...ux-mips.org>
CC:	Paul Burton <paul.burton@...tec.com>,
	<linux-kernel@...r.kernel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	James Hogan <james.hogan@...tec.com>,
	Markos Chandras <markos.chandras@...tec.com>,
	Ralf Baechle <ralf@...ux-mips.org>,
	"Marc Zyngier" <marc.zyngier@....com>
Subject: [PATCH 0/3] MIPS GIC fixes

This series fixes a couple of problems with the MIPS GIC support,
impacting systems with the 64 bit CM3 and those with multithreading and
non-contiguous numbering for VP(E)s across cores.

Paul Burton (3):
  MIPS: CM: provide a function to map from CPU to VP ID
  irqchip: mips-gic: convert CPU numbers to VP IDs
  irqchip: mips-gic: fix pending & mask reads for MIPS64 with 32b GIC

 arch/mips/include/asm/mips-cm.h | 39 +++++++++++++++++++++++++++++++++++++++
 drivers/irqchip/irq-mips-gic.c  | 12 ++++++++++--
 2 files changed, 49 insertions(+), 2 deletions(-)

-- 
2.5.3

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