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Message-ID: <1442947373-13345-7-git-send-email-paul.burton@imgtec.com>
Date: Tue, 22 Sep 2015 11:42:53 -0700
From: Paul Burton <paul.burton@...tec.com>
To: <linux-mips@...ux-mips.org>
CC: Paul Burton <paul.burton@...tec.com>,
Joshua Kinard <kumba@...too.org>,
Leonid Yegoshin <Leonid.Yegoshin@...tec.com>,
"Maciej W. Rozycki" <macro@...ux-mips.org>,
<linux-kernel@...r.kernel.org>,
James Hogan <james.hogan@...tec.com>,
Markos Chandras <markos.chandras@...tec.com>,
"Ralf Baechle" <ralf@...ux-mips.org>
Subject: [PATCH 6/6] MIPS: allow RIXI for 32-bit kernels on MIPS64
Commit a68d09a156b2 ("MIPS: Don't use RI/XI with 32-bit kernels on
64-bit CPUs") prevented use of RIXI on MIPS64 systems, stating that the
"TLB handlers cannot handle this case". What they actually couldn't
handle was cases where there were less fill bits in the Entry{Lo,Hi}
registers than bits used by software in PTEs. The handlers can now deal
with this case, so enable RIXI for MIPS32 kernels on MIPS64 systems.
Note that beyond the obvious benefits provided by having RIXI on such
systems, this is required for systems implementing MIPSr6 where RIXI
cannot be disabled.
This reverts commit a68d09a156b2 ("MIPS: Don't use RI/XI with 32-bit
kernels on 64-bit CPUs").
Signed-off-by: Paul Burton <paul.burton@...tec.com>
---
arch/mips/include/asm/cpu-features.h | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 9801ac9..7cb7c10 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -128,11 +128,7 @@
#endif
#ifndef cpu_has_rixi
-# ifdef CONFIG_64BIT
-# define cpu_has_rixi (cpu_data[0].options & MIPS_CPU_RIXI)
-# else /* CONFIG_32BIT */
-# define cpu_has_rixi ((cpu_data[0].options & MIPS_CPU_RIXI) && !cpu_has_64bits)
-# endif
+#define cpu_has_rixi (cpu_data[0].options & MIPS_CPU_RIXI)
#endif
#ifndef cpu_has_mmips
--
2.5.3
--
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