linux-kernel - Re: [PATCH 0/3] MIPS GIC fixes

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Message-ID: <alpine.DEB.2.11.1509222106100.5606@nanos>
Date:	Tue, 22 Sep 2015 21:07:15 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Paul Burton <paul.burton@...tec.com>
cc:	linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
	Jason Cooper <jason@...edaemon.net>,
	James Hogan <james.hogan@...tec.com>,
	Markos Chandras <markos.chandras@...tec.com>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Marc Zyngier <marc.zyngier@....com>
Subject: Re: [PATCH 0/3] MIPS GIC fixes

On Tue, 22 Sep 2015, Paul Burton wrote:

> This series fixes a couple of problems with the MIPS GIC support,
> impacting systems with the 64 bit CM3 and those with multithreading and
> non-contiguous numbering for VP(E)s across cores.
> 
> Paul Burton (3):
>   MIPS: CM: provide a function to map from CPU to VP ID
>   irqchip: mips-gic: convert CPU numbers to VP IDs
>   irqchip: mips-gic: fix pending & mask reads for MIPS64 with 32b GIC

I assume that's a bugfix scheduled for 4.3.

Ralf, if so, please ship it through the MIPS tree with my Acked-by for
the irqchip parts.

Thanks,

	tglx


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