lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Mon, 5 Oct 2015 14:19:55 +0000
From:	Appana Durga Kedareswara Rao <appana.durga.rao@...inx.com>
To:	"Koul, Vinod" <vinod.koul@...el.com>
CC:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"Anirudha Sarangi" <anirudh@...inx.com>,
	Michal Simek <michals@...inx.com>,
	"Williams, Dan J" <dan.j.williams@...el.com>,
	Soren Brinkmann <sorenb@...inx.com>,
	"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"arnd@...db.de" <arnd@...db.de>
Subject: RE: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory
 Access Engine driver support

Hi Vinod,

> -----Original Message-----
> From: dmaengine-owner@...r.kernel.org [mailto:dmaengine-
> owner@...r.kernel.org] On Behalf Of Koul, Vinod
> Sent: Monday, October 05, 2015 7:40 PM
> To: Appana Durga Kedareswara Rao
> Cc: linux-kernel@...r.kernel.org; Anirudha Sarangi; Michal Simek; Williams, Dan
> J; Soren Brinkmann; dmaengine@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; arnd@...db.de
> Subject: Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory
> Access Engine driver support
> 
> On Mon, 2015-10-05 at 13:50 +0000, Appana Durga Kedareswara Rao wrote:
> 
> > >
> > > On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana
> wrote:
> > > > This is the driver for the AXI Central Direct Memory Access (AXI
> > > > CDMA) core, which is a soft Xilinx IP core that provides
> > > > high-bandwidth Direct Memory Access (DMA) between a memory-mapped
> > > > source address and a memory-mapped destination address.
> > >
> > > Where is the 1/2 here ? I have only this one in my mails..
> >
> > You are there in the 1/2 not the dmaengine@...r.kernel.org.
> 
> The threading is broken in your patch series. ON searching I found the 1/2.
> Please make sure patch series are threaded properly.
> 

Sorry for the noise will take care from the next series onwards.

Regards,
Kedar.

> --
> ~Vinod
> N     r  y   b X  ǧv ^ )޺{.n +       )ފ{ay .ʇڙ ,j   f   h   z . w       j:+v   w j m         zZ+     ݢj"  !
> i

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ