lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Mon, 5 Oct 2015 15:48:39 +0000
From:	Appana Durga Kedareswara Rao <appana.durga.rao@...inx.com>
To:	Vinod Koul <vinod.koul@...el.com>
CC:	"dan.j.williams@...el.com" <dan.j.williams@...el.com>,
	Michal Simek <michals@...inx.com>,
	Soren Brinkmann <sorenb@...inx.com>,
	"moritz.fischer@...us.com" <moritz.fischer@...us.com>,
	"anirudha@...inx.com" <anirudha@...inx.com>,
	"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Anirudha Sarangi <anirudh@...inx.com>
Subject: RE: [PATCH v9] dmaengine: Add Xilinx AXI Direct Memory Access
 Engine driver support

Hi Vinod,


> -----Original Message-----
> From: Vinod Koul [mailto:vinod.koul@...el.com]
> Sent: Monday, October 05, 2015 8:57 PM
> To: Appana Durga Kedareswara Rao
> Cc: dan.j.williams@...el.com; Michal Simek; Soren Brinkmann;
> moritz.fischer@...us.com; Appana Durga Kedareswara Rao;
> anirudha@...inx.com; dmaengine@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH v9] dmaengine: Add Xilinx AXI Direct Memory Access Engine
> driver support
> 
> On Mon, Aug 24, 2015 at 09:41:06PM +0530, Kedareswara rao Appana wrote:
> > This is the driver for the AXI Direct Memory Access (AXI DMA) core,
> > which is a soft Xilinx IP core that provides high- bandwidth direct
> > memory access between memory and AXI4-Stream type target peripherals.
> 
> Okay reviewing this after the other Xilinx driver with very similar name, I am very
> concerned about code duplication. Both codes seems to be pretty much copy
> paste and some modifications for IP. In Linux kernel we reuse!
> 
> Please create common lib for Xilinx drivers to use and have HW diff is two
> drivers, or manage those with different driver ops
> 
> Pls justify why we should have two drivers. Looking at code makes me think
> otherwise


I agree with you and even initially we had a common driver with the similar implementation as you were mentioning. 
Later on, being soft IPs, new features were added and the IPs became diversified. As an example, this driver has a residue
Calculation whereas the other driver (VDMA) is not applicable and the way interrupts are handled is completely different.
Briefly, they are two complete different IPs with a different register set and descriptor format. Eventually, it became too complex
To manage the common driver as the code became messy with lot of conditions around. Mainly the validation process is a big concern, as every change
In the IP compels to test all the complete features of both IPs.  So, we got convinced to the approach of separating the drivers to overcome this and it comes with
Few addition lines of common code.

Please let me know if I am not clear.

Regards,
Kedar.

> 
> --
> ~Vinod
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists