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Message-ID: <1444864456-21778-1-git-send-email-dinguyen@opensource.altera.com>
Date:	Wed, 14 Oct 2015 18:14:16 -0500
From:	<dinguyen@...nsource.altera.com>
To:	<tthayer@...nsource.altera.com>
CC:	<dinh.linux@...il.com>, <dougthompson@...ssion.com>,
	<bp@...en8.de>, <mchehab@....samsung.com>,
	<linux-edac@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	Dinh Nguyen <dinguyen@...nsource.altera.com>
Subject: [PATCH] EDAC, altera: SoCFPGA EDAC should not look for ECC_CORR_EN

From: Dinh Nguyen <dinguyen@...nsource.altera.com>

The bootloader may or may not enable the ECC_CORR_EN bit. By not enabling
ECC_CORR_EN, when error happens, it is the user's responsibility to perform
a full SDRAM scrub.

Remove the check for ECC_CORR_EN.

Signed-off-by: Dinh Nguyen <dinguyen@...nsource.altera.com>
---
 drivers/edac/altera_edac.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h
index 7b64dc7..7a52585 100644
--- a/drivers/edac/altera_edac.h
+++ b/drivers/edac/altera_edac.h
@@ -30,8 +30,7 @@
 #define CV_CTLCFG_GEN_SB_ERR       0x2000
 #define CV_CTLCFG_GEN_DB_ERR       0x4000
 
-#define CV_CTLCFG_ECC_AUTO_EN     (CV_CTLCFG_ECC_EN | \
-				   CV_CTLCFG_ECC_CORR_EN)
+#define CV_CTLCFG_ECC_AUTO_EN     (CV_CTLCFG_ECC_EN)
 
 /* SDRAM Controller Address Width Register */
 #define CV_DRAMADDRW_OFST          0x2C
-- 
2.4.5

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