linux-kernel - Re: [PATCH v2 02/32] devicetree: bindings: scsi: HiSi SAS

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <562F9016.50807@linaro.org>
Date:	Tue, 27 Oct 2015 22:54:14 +0800
From:	zhangfei <zhangfei.gao@...aro.org>
To:	Mark Rutland <mark.rutland@....com>,
	John Garry <john.garry@...wei.com>
CC:	JBottomley@...n.com, robh+dt@...nel.org, pawel.moll@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org, arnd@...db.de,
	linux-scsi@...r.kernel.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, linuxarm@...wei.com,
	john.garry2@...l.dcu.ie, hare@...e.de, xuwei5@...ilicon.com
Subject: Re: [PATCH v2 02/32] devicetree: bindings: scsi: HiSi SAS



On 10/27/2015 10:39 PM, Mark Rutland wrote:
> On Tue, Oct 27, 2015 at 01:09:15PM +0000, John Garry wrote:
>> On 26/10/2015 14:45, Mark Rutland wrote:
>>> On Mon, Oct 26, 2015 at 10:14:33PM +0800, John Garry wrote:
>>>> Add devicetree bindings for HiSilicon SAS driver.
>>>>
>>>> Signed-off-by: John Garry <john.garry@...wei.com>
>>>> ---
>>>>   .../devicetree/bindings/scsi/hisilicon-sas.txt     | 70 ++++++++++++++++++++++
>>>>   1 file changed, 70 insertions(+)
>>>>   create mode 100644 Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
>>>> new file mode 100644
>>>> index 0000000..d1e7b2a
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
>>>> @@ -0,0 +1,70 @@
>>>> +* HiSilicon SAS controller
>>>> +
>>>> +The HiSilicon SAS controller supports SAS/SATA.
>>>> +
>>>> +Main node required properties:
>>>> +  - compatible : value should be as follows:
>>>> +	(a) "hisilicon,sas-controller-v1" for v1 of HiSilicon SAS controller IP
>>>> +  - reg : Address and length of the SAS register
>>>> +  - hisilicon,sas-syscon: phandle of syscon used for sas control
>>>> +  - ctrl-reg : offset to the following SAS control registers (in order):
>>>> +		- reset assert
>>>> +		- clock disable
>>>> +		- reset status
>>>> +		- reset de-assert
>>>> +		- clock enable
>>>
>>> This needs a better name, and it should probably be split up into
>>> several properties.
>>>
>>> However, it sounds like the syscon is actually a clock+reset
>>> controller, and should be modelled as such. It's not actually a part of
>>> the SAS controller as such.
>>
>> The syscon block is a general subsystem control block, and it is not
>> specifically only for controlling reset and enabling clocks (other
>> functions include serdes control, for example). It is also shared
>> with other peripherals.
>>
>> So we can remove the ctrl-reg property (since it is not part of the
>> SAS controller), and add the relevant syscon register offsets to the
>> "hisilicon,sas-syscon" property, like this:
>> hisilicon,sas-syscon = <&sas_ctrl0 0xa60 0x33c 0x5a30 0xa64 0x338>;
>>
>> Ok?
>
> It would be better to have each offset in a separate property.
>
These register are not used for different purpose.
Instead, they are all used for one purpose, reset the sas controller;
Though a bit complicated, the silicon has special requirement here.

So still prefer using the original method,
ctrl-reg = <0xa60 0x33c 0x5a30 0xa64 0x338>;
Since we can simply use of_property_read_u32_array.

Thanks

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/