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Message-Id: <201510282347.27379.marex@denx.de>
Date:	Wed, 28 Oct 2015 23:47:27 +0100
From:	Marek Vasut <marex@...x.de>
To:	Robert Jarzmik <robert.jarzmik@...e.fr>
Cc:	Brian Norris <computersforpeace@...il.com>,
	Boris Brezillon <boris.brezillon@...e-electrons.com>,
	linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
	Scott Wood <scottwood@...escale.com>,
	Josh Wu <josh.wu@...el.com>,
	Kyungmin Park <kyungmin.park@...sung.com>,
	Han Xu <han.xu@...escale.com>,
	Huang Shijie <shijie.huang@....com>
Subject: Re: [PATCH 1/5] mtd: ofpart: grab device tree node directly from master device node

On Wednesday, October 28, 2015 at 09:55:24 PM, Robert Jarzmik wrote:
> Brian Norris <computersforpeace@...il.com> writes:
> >> > Do some sorts of chipselects come into play here ? Ie. you can have
> >> > one master with multiple NAND chips connected to it.
> >> 
> >> Most NAND controllers support interacting with several chips (or
> >> dies in case your chip embeds several NAND dies), but I keep thinking
> >> each physical chip should have its own instance of nand_chip + mtd_info.
> >> If you want to have a single mtd device aggregating several chips you
> >> can use mtdconcat.
> >> 
> >> This leaves the multi-dies chip case, and IHMO we should represent those
> >> chips as a single entity, and I guess that's the purpose of the
> >> ->numchips field in nand_chip (if your chip embeds 2 dies with 2 CS
> >> lines, then ->numchips should be 2).
> > 
> > Yes, I think that's some of the intention there. And so even in that
> > case, a multi-die chip gets represented as a single struct nand_chip.
> 
> Isn't there the case of a single NAND controller with 2 identical chips,
> each a 8 bit NAND chip, and the controller aggregating them to offer the
> OS a single 16-bit NAND chip ?

Is that using 1 or 2 physical chipselect lines on the CPU (controller) ?

> In this case, the controller (pxa3xx is a good example) will be programmed
> to handle both chips at the same time, and calculate CRC on both chips,
> etc ... I hope the assertion "physical chip should have its own instance
> of nand_chip + mtd_info" does take into account this example.
> 
> I don't know if there is actually any user of this for either pxa3xx or
> another controller, nor if there is any value in this.
> 
> Cheers.

Best regards,
Marek Vasut
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