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Date:	Thu, 29 Oct 2015 07:32:33 +0100
From:	Robert Jarzmik <robert.jarzmik@...e.fr>
To:	Marek Vasut <marex@...x.de>
Cc:	Brian Norris <computersforpeace@...il.com>,
	Boris Brezillon <boris.brezillon@...e-electrons.com>,
	linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Ezequiel Garcia <ezequiel.garcia@...e-electrons.com>,
	Scott Wood <scottwood@...escale.com>,
	Josh Wu <josh.wu@...el.com>,
	Kyungmin Park <kyungmin.park@...sung.com>,
	Han Xu <han.xu@...escale.com>,
	Huang Shijie <shijie.huang@....com>
Subject: Re: [PATCH 1/5] mtd: ofpart: grab device tree node directly from master device node

Marek Vasut <marex@...x.de> writes:

>> Isn't there the case of a single NAND controller with 2 identical chips,
>> each a 8 bit NAND chip, and the controller aggregating them to offer the
>> OS a single 16-bit NAND chip ?
>
> Is that using 1 or 2 physical chipselect lines on the CPU (controller) ?
I think it's 2 physical chipselects (CS0 and CS1). The way I understand it is
that the NAND controller asserts them both, issues the command on the command
line (shared between the 2 chips), and reads/writes on the separate data lines.

Cheers.

-- 
Robert
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