linux-kernel - [PATCH V5 RESEND 1/3] docs: iommu: Documentation for iommu in hi6220 SoC

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Message-ID: <1447986309-47548-2-git-send-email-puck.chen@hisilicon.com>
Date:	Fri, 20 Nov 2015 10:25:07 +0800
From:	Chen Feng <puck.chen@...ilicon.com>
To:	<joro@...tes.org>, <puck.chen@...ilicon.com>,
	<iommu@...ts.linux-foundation.org>, <linux-kernel@...r.kernel.org>,
	<robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
	<ijc+devicetree@...lion.org.uk>, <devicetree@...r.kernel.org>
CC:	<puck.chen@...yun.com>, <w.f@...wei.com>, <xuwei5@...ilicon.com>,
	<guodong.xu@...aro.org>, <arnd@...aro.org>,
	<haojian.zhuang@...aro.org>
Subject: [PATCH V5 RESEND 1/3] docs: iommu: Documentation for iommu in hi6220 SoC

Documentation for hi6220 iommu driver.

Signed-off-by: Chen Feng <puck.chen@...ilicon.com>
---
 .../bindings/iommu/hisi,hi6220-iommu.txt           | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt

diff --git a/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
new file mode 100644
index 0000000..44f9101
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt
@@ -0,0 +1,32 @@
+Hi6220 SoC SMMU Device Driver devicetree document
+The media system shared the same smmu IP to access DDR memory. And all
+media IP used the same page table.
+
+Below binding describes the system mmu for media system in hi6220 platform
+
+Required properties:
+- compatible: should contain "hisilicon,hi6220-smmu".
+- reg: A tuple of base address and size of System MMU registers.
+- clocks: a list of phandle + clock-specifier pairs, one for each entry
+  in clock-names.
+- clock-names: should contain:
+  * "smmu"
+  * "media-sc"
+  * "smmu-peri"
+- interrupts: An interrupt specifier for interrupt signal of System MMU.
+- #iommu-cells: The iommu-cells should be 0. Because no additional information
+  needs to be encoded in the specifier.
+
+Examples:
+	iommu@...10000 {
+		compatible = "hisilicon,hi6220-smmu";
+		reg = <0x0 0xf4210000 0x0 0x1000>;
+		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&sys_ctrl HI6220_MMU_CLK>,
+		         <&media_ctrl HI6220_MED_MMU>,
+		         <&sys_ctrl HI6220_MEDIA_PLL_SRC>;
+		clock-names = "smmu",
+			      "media-sc",
+			      "smmu-peri";
+		#iommu-cells = <0>;
+	};
-- 
1.9.1

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