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Message-ID: <7182714.6Xmo6Noc6V@wuerfel>
Date: Sat, 21 Nov 2015 21:49:20 +0100
From: Arnd Bergmann <arnd@...db.de>
To: Joshua Henderson <joshua.henderson@...rochip.com>
Cc: linux-kernel@...r.kernel.org, linux-mips@...ux-mips.org,
Purna Chandra Mandal <purna.mandal@...rochip.com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>, devicetree@...r.kernel.org
Subject: Re: [PATCH 03/14] DEVICETREE: Add PIC32 clock binding documentation
On Friday 20 November 2015 17:17:15 Joshua Henderson wrote:
> +/* PIC32 specific clks */
> +pic32_clktree {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x1f801200 0x200>;
> + compatible = "microchip,pic32-clk";
> + interrupts = <12>;
> + ranges;
> +
> + /* secondary oscillator; external input on SOSCI pin */
> + SOSC:sosc_clk {
> + #clock-cells = <0>;
> + compatible = "microchip,pic32-sosc";
> + clock-frequency = <32768>;
> + reg = <0x1f801200 0x10 /* enable reg */
> + 0x1f801390 0x10>; /* status reg */
> + microchip,bit-mask = <0x02>; /* enable mask */
> + microchip,status-bit-mask = <0x10>; /* status-mask*/
> + };
>
If you want to use the reg property in this way for each cell,
at least use a 'ranges' that only translates the actual registers
like this
ranges = <0 0x1f801200 0x200>
sosc_clk {
...
reg = <0x000 0x10>, <0x190 0x10>;
...
};
Arnd
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