linux-kernel - Re: [PATCH 02/14] irqchip: irq-pic32-evic: Add support for PIC32 interrupt controller

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Message-ID: <20151122114530.10bca210@arm.com>
Date:	Sun, 22 Nov 2015 11:45:30 +0000
From:	Marc Zyngier <marc.zyngier@....com>
To:	Joshua Henderson <joshua.henderson@...rochip.com>
Cc:	<linux-kernel@...r.kernel.org>, <linux-mips@...ux-mips.org>,
	Cristian Birsan <cristian.birsan@...rochip.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>
Subject: Re: [PATCH 02/14] irqchip: irq-pic32-evic: Add support for PIC32
 interrupt controller

On Fri, 20 Nov 2015 17:17:14 -0700
Joshua Henderson <joshua.henderson@...rochip.com> wrote:

Joshua, Cristian,

> From: Cristian Birsan <cristian.birsan@...rochip.com>
> 
> This adds support for the EVIC present on a PIC32MZDA.
> 
> The following features are supported:
>  - DT properties for EVIC and for devices that use interrupt lines
>  - persistent and non-persistent interrupt handling
>  - Priority, sub-priority and polariy settings for each interrupt line
>  - irqdomain support
> 

I haven't reviewed the code yet, but the fact that you allow (and
actually request) the interrupt priorities to be encoded in the DT
raises some concerns:

- Aren't priorities entirely under software control (and hence don't
  belong in DT)?
- More crucially, how do you deal with nested interrupts when you have
  interrupts running at different priorities? Most parts of Linux
  cannot cope with that without additional support.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny.
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