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Message-ID: <20151203211937.GD18534@tassilo.jf.intel.com>
Date:	Thu, 3 Dec 2015 13:19:37 -0800
From:	Andi Kleen <ak@...ux.intel.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Stephane Eranian <eranian@...gle.com>,
	linux-kernel@...r.kernel.org, acme@...hat.com, mingo@...e.hu,
	kan.liang@...el.com
Subject: Re: [PATCH v2 1/2] perf/x86: fix PEBS and LBR issues on Intel Atom

On Thu, Dec 03, 2015 at 09:51:37PM +0100, Peter Zijlstra wrote:
> On Thu, Dec 03, 2015 at 09:03:09PM +0100, Stephane Eranian wrote:
> > This patches fixes a number of problems in the PEBS
> > and LBR support of Intel Atom. Those bugs were introduced
> > by the recent changes to the PEBS code to handle multiple
> > entries.
> 
> AFAICT the PEBS and LBR issues are separate, and this should therefore
> be 2 patches.

The hunk to allow other PEBS events is also separate
(it's not needed for cycles:pp)

-Andi

-- 
ak@...ux.intel.com -- Speaking for myself only
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