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Date:	Thu, 3 Dec 2015 13:44:42 -0800
From:	Stephane Eranian <eranian@...gle.com>
To:	Andi Kleen <ak@...ux.intel.com>
Cc:	LKML <linux-kernel@...r.kernel.org>,
	Arnaldo Carvalho de Melo <acme@...hat.com>,
	Peter Zijlstra <peterz@...radead.org>,
	"mingo@...e.hu" <mingo@...e.hu>, "Liang, Kan" <kan.liang@...el.com>
Subject: Re: [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom

On Thu, Dec 3, 2015 at 12:14 PM, Andi Kleen <ak@...ux.intel.com> wrote:
>
> >       /* INST_RETIRED.ANY_P, inv=1, cmask=16 (cycles:p). */
> >       INTEL_FLAGS_EVENT_CONSTRAINT(0x108000c0, 0x01),
> > +     /* Allow all events as PEBS with no flags */
> > +     INTEL_ALL_EVENT_CONSTRAINT(0, 0x1),
>
> I don't think this is really needed (no extra PEBS events), but ok it shouldn't
> hurt either.
>
Has to do with consistent behavior. Do not get an error if trying PEBS
on non-PEBS
event, like for the other CPUs.
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