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Message-id: <5667B2F3.9040807@samsung.com>
Date: Wed, 09 Dec 2015 13:49:55 +0900
From: Krzysztof Kozlowski <k.kozlowski@...sung.com>
To: Marek Szyprowski <m.szyprowski@...sung.com>,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Sylwester Nawrocki <s.nawrocki@...sung.com>,
Tomasz Figa <tomasz.figa@...il.com>,
Mike Turquette <mturquette@...libre.com>,
Kukjin Kim <kgene@...nel.org>
Subject: Re: [PATCH 1/2] clk: samsung: exynos5422: add missing parent GSCL
block clocks
On 08.12.2015 22:46, Marek Szyprowski wrote:
> This patch adds clocks, which are required for preserving parent clock
> configuration on GSCL power domain on/off.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@...sung.com>
> ---
> drivers/clk/samsung/clk-exynos5420.c | 8 ++++----
> include/dt-bindings/clock/exynos5420.h | 2 ++
> 2 files changed, 6 insertions(+), 4 deletions(-)
I suppose that, with ack from clock folks, this can go through samsung-soc?
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@...sung.com>
Best regards,
Krzysztof
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