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Message-ID: <20151209204103.GJ5727@sirena.org.uk>
Date: Wed, 9 Dec 2015 20:41:03 +0000
From: Mark Brown <broonie@...nel.org>
To: Bhuvanchandra DV <bhuvanchandra.dv@...adex.com>
Cc: stefan@...er.ch, linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] spi-fsl-dspi: Fix CTAR Register access
On Wed, Dec 09, 2015 at 11:51:39AM +0530, Bhuvanchandra DV wrote:
> DSPI instances in Vybrid have a different amount of chip selects
> and CTARs (Clock and transfer Attributes Register). In case of
> DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
This doesn't apply against, current code - please check and resend.
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