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Message-ID: <566902B1.2080503@toradex.com>
Date:	Thu, 10 Dec 2015 10:12:25 +0530
From:	Bhuvanchandra DV <bhuvanchandra.dv@...adex.com>
To:	Mark Brown <broonie@...nel.org>
CC:	<stefan@...er.ch>, <linux-spi@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>,
	Bhuvanchandra <bhuvanchandra.dv@...adex.com>
Subject: Re: [PATCH] spi-fsl-dspi: Fix CTAR Register access

On 12/10/2015 02:11 AM, Mark Brown wrote:
> On Wed, Dec 09, 2015 at 11:51:39AM +0530, Bhuvanchandra DV wrote:
>> DSPI instances in Vybrid have a different amount of chip selects
>> and CTARs (Clock and transfer Attributes Register). In case of
>> DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
>
> This doesn't apply against, current code - please check and resend.

Will check and resend.

>

-- 
Best regards,
Bhuvan
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