linux-kernel - Re: [PATCH] crypto/nx842: Mask XERS0 bit in return value

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Message-ID: <20151217084555.GA9239@gondor.apana.org.au>
Date:	Thu, 17 Dec 2015 16:45:55 +0800
From:	Herbert Xu <herbert@...dor.apana.org.au>
To:	Haren Myneni <haren@...ux.vnet.ibm.com>
Cc:	segher@...nel.crashing.org, ddstreet@...e.org, davem@...emloft.net,
	pair@...ibm.com, mpe@...erman.id.au, linux-crypto@...r.kernel.org,
	linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] crypto/nx842: Mask XERS0 bit in return value

On Sun, Dec 13, 2015 at 03:30:41AM -0800, Haren Myneni wrote:
> 
> NX842 coprocessor sets 3rd bit in CR register with XER[S0] which is
> nothing to do with NX request. Since this bit can be set with other
> valuable return status, mast this bit.
> 
> One of other bits (INITIATED, BUSY or REJECTED) will be returned for
> any given NX request.
> 
> Signed-off-by: Haren Myneni <haren@...ibm.com>

Patch applied.  Thanks.
-- 
Email: Herbert Xu <herbert@...dor.apana.org.au>
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