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Date: Wed, 23 Dec 2015 21:30:10 +0100 From: Carlos Soto <csotoalonso@...il.com> To: Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <kernel@...gutronix.de>, Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...eaurora.org>, linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org Cc: linux-kernel@...r.kernel.org, Carlos Soto <csotoalonso@...il.com> Subject: [PATCH 1/1] imx25: Fix LCD pixelclock configuration Set LCDC base clock (per_7) parent clock to UPLL clock. This is needed to allow finer resolution in pixelclock Signed-off-by: Carlos Soto <csotoalonso@...il.com> --- drivers/clk/imx/clk-imx25.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c index c4c141c..656340e 100644 --- a/drivers/clk/imx/clk-imx25.c +++ b/drivers/clk/imx/clk-imx25.c @@ -238,6 +238,12 @@ static int __init __mx25_clocks_init(unsigned long osc_rate, clk_set_parent(clk[per5_sel], clk[ahb]); /* + * set LCDC base clock (per 7) to highest possible frequency (UPLL) + * to get best resolution for pixel clock + */ + clk_set_parent(clk[per7_sel], clk[upll]); + + /* * Let's initially set up CLKO parent as ipg, since this configuration * is used on some imx25 board designs to clock the audio codec. */ -- 1.7.10.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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