| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <1451881723-2478-16-git-send-email-milo.kim@ti.com>
Date: Mon, 4 Jan 2016 13:28:39 +0900
From: Milo Kim <milo.kim@...com>
To: <tglx@...utronix.de>
CC: <jason@...edaemon.net>, <marc.zyngier@....com>,
<alexandre.belloni@...e-electrons.com>,
<boris.brezillon@...e-electrons.com>,
<ludovic.desroches@...el.com>, <nicolas.ferre@...el.com>,
<linux-kernel@...r.kernel.org>, Milo Kim <milo.kim@...com>
Subject: [PATCH 15/19] irqchip: atmel-aic: add common interrupt handler
AIC and AIC5 have same interrupt handling process.
1. Read IVR (Interrupt Vector Register) to get a HW IRQ number.
2. Read ISR (Interrupt Status Register) to get current IRQ source number.
3. Indicate the interrupt handling is complete if no interrupt condition.
Otherwise, handle current interrupt.
With aic_reg_data configuration, two handlers can be combined.
And irq_domain also can be moved to common part.
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Jason Cooper <jason@...edaemon.net>
Cc: Marc Zyngier <marc.zyngier@....com>
Cc: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc: Boris BREZILLON <boris.brezillon@...e-electrons.com>
Cc: Ludovic Desroches <ludovic.desroches@...el.com>
Cc: Nicolas Ferre <nicolas.ferre@...el.com>
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Milo Kim <milo.kim@...com>
---
drivers/irqchip/irq-atmel-aic-common.c | 24 ++++++++++++++++++++++++
drivers/irqchip/irq-atmel-aic.c | 25 -------------------------
drivers/irqchip/irq-atmel-aic5.c | 24 ------------------------
3 files changed, 24 insertions(+), 49 deletions(-)
diff --git a/drivers/irqchip/irq-atmel-aic-common.c b/drivers/irqchip/irq-atmel-aic-common.c
index 67f9204..3d8cc8d 100644
--- a/drivers/irqchip/irq-atmel-aic-common.c
+++ b/drivers/irqchip/irq-atmel-aic-common.c
@@ -17,11 +17,15 @@
#include <linux/errno.h>
#include <linux/io.h>
#include <linux/irq.h>
+#include <linux/irqdesc.h>
#include <linux/irqdomain.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/slab.h>
+#include <asm/exception.h>
+#include <asm/mach/irq.h>
+
#include "irq-atmel-aic-common.h"
#define NR_AIC_IRQS 32
@@ -129,8 +133,23 @@ static const struct aic_reg_offset aic5_regs = {
.isr = AT91_AIC5_ISR,
};
+static struct irq_domain *aic_domain;
static const struct aic_reg_offset *aic_reg_data;
+static asmlinkage void __exception_irq_entry
+aic_handle(struct pt_regs *regs)
+{
+ struct irq_chip_generic *gc = irq_get_domain_generic_chip(aic_domain,
+ 0);
+ u32 hwirq = irq_reg_readl(gc, aic_reg_data->ivr);
+ u32 status = irq_reg_readl(gc, aic_reg_data->isr);
+
+ if (!status)
+ irq_reg_writel(gc, 0, aic_reg_data->eoi);
+ else
+ handle_domain_irq(aic_domain, hwirq, regs);
+}
+
static inline bool aic_is_ssr_used(void)
{
return aic_reg_data->ssr != AT91_INVALID_OFFSET;
@@ -483,6 +502,9 @@ struct irq_domain *__init aic_common_of_init(struct device_node *node,
int ret;
int i;
+ if (aic_domain)
+ return ERR_PTR(-EEXIST);
+
nchips = DIV_ROUND_UP(nirqs, AIC_IRQS_PER_CHIP);
reg_base = of_iomap(node, 0);
@@ -532,8 +554,10 @@ struct irq_domain *__init aic_common_of_init(struct device_node *node,
gc->private = &aic[i];
}
+ aic_domain = domain;
aic_common_ext_irq_of_init(domain);
aic_hw_init(domain);
+ set_handle_irq(aic_handle);
return domain;
diff --git a/drivers/irqchip/irq-atmel-aic.c b/drivers/irqchip/irq-atmel-aic.c
index ef2cfb8..44cedce 100644
--- a/drivers/irqchip/irq-atmel-aic.c
+++ b/drivers/irqchip/irq-atmel-aic.c
@@ -55,40 +55,15 @@
#define AT91_AIC_SPU 0x134
#define AT91_AIC_DCR 0x138
-static struct irq_domain *aic_domain;
-
-static asmlinkage void __exception_irq_entry
-aic_handle(struct pt_regs *regs)
-{
- struct irq_domain_chip_generic *dgc = aic_domain->gc;
- struct irq_chip_generic *gc = dgc->gc[0];
- u32 irqnr;
- u32 irqstat;
-
- irqnr = irq_reg_readl(gc, AT91_AIC_IVR);
- irqstat = irq_reg_readl(gc, AT91_AIC_ISR);
-
- if (!irqstat)
- irq_reg_writel(gc, 0, AT91_AIC_EOICR);
- else
- handle_domain_irq(aic_domain, irqnr, regs);
-}
-
static int __init aic_of_init(struct device_node *node,
struct device_node *parent)
{
struct irq_domain *domain;
- if (aic_domain)
- return -EEXIST;
-
domain = aic_common_of_init(node, "atmel-aic", NR_AIC_IRQS);
if (IS_ERR(domain))
return PTR_ERR(domain);
- aic_domain = domain;
- set_handle_irq(aic_handle);
-
return 0;
}
IRQCHIP_DECLARE(at91rm9200_aic, "atmel,at91rm9200-aic", aic_of_init);
diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c
index 4551bf6..d09cefe 100644
--- a/drivers/irqchip/irq-atmel-aic5.c
+++ b/drivers/irqchip/irq-atmel-aic5.c
@@ -65,24 +65,6 @@
#define AT91_AIC5_FFDR 0x54
#define AT91_AIC5_FFSR 0x58
-static struct irq_domain *aic5_domain;
-
-static asmlinkage void __exception_irq_entry
-aic5_handle(struct pt_regs *regs)
-{
- struct irq_chip_generic *bgc = irq_get_domain_generic_chip(aic5_domain, 0);
- u32 irqnr;
- u32 irqstat;
-
- irqnr = irq_reg_readl(bgc, AT91_AIC5_IVR);
- irqstat = irq_reg_readl(bgc, AT91_AIC5_ISR);
-
- if (!irqstat)
- irq_reg_writel(bgc, 0, AT91_AIC5_EOICR);
- else
- handle_domain_irq(aic5_domain, irqnr, regs);
-}
-
static int __init aic5_of_init(struct device_node *node,
struct device_node *parent,
int nirqs)
@@ -92,16 +74,10 @@ static int __init aic5_of_init(struct device_node *node,
if (nirqs > NR_AIC5_IRQS)
return -EINVAL;
- if (aic5_domain)
- return -EEXIST;
-
domain = aic_common_of_init(node, "atmel-aic5", nirqs);
if (IS_ERR(domain))
return PTR_ERR(domain);
- aic5_domain = domain;
- set_handle_irq(aic5_handle);
-
return 0;
}
--
2.6.4
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists