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Message-Id: <1452281139-32352-1-git-send-email-tim.gardner@canonical.com>
Date: Fri, 8 Jan 2016 12:25:39 -0700
From: tim.gardner@...onical.com
To: dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Tim Gardner <tim.gardner@...onical.com>,
Vinod Koul <vinod.koul@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
Dave Jiang <dave.jiang@...el.com>,
Prarit Bhargava <prarit@...hat.com>,
Nicholas Mc Guire <der.herr@...r.at>,
Jarkko Nikula <jarkko.nikula@...ux.intel.com>
Subject: [PATCH v4.4-rc8 v3] dmaengine: ioatdma: Squelch framesize warnings
From: Tim Gardner <tim.gardner@...onical.com>
CC [M] drivers/dma/ioat/prep.o
drivers/dma/ioat/prep.c: In function 'ioat_prep_pqxor':
drivers/dma/ioat/prep.c:682:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=]
}
^
drivers/dma/ioat/prep.c: In function 'ioat_prep_pqxor_val':
drivers/dma/ioat/prep.c:714:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=]
}
gcc version 5.3.1 20151219 (Ubuntu 5.3.1-4ubuntu1)
Cc: Vinod Koul <vinod.koul@...el.com>
Cc: Dan Williams <dan.j.williams@...el.com>
Cc: Dave Jiang <dave.jiang@...el.com>
Cc: Prarit Bhargava <prarit@...hat.com>
Cc: Nicholas Mc Guire <der.herr@...r.at>
Cc: Jarkko Nikula <jarkko.nikula@...ux.intel.com>
Signed-off-by: Tim Gardner <tim.gardner@...onical.com>
---
v2 - use per CPU static buffers instead of dynamically allocating memory.
v3 - Use get_cpu_var/put_cpu_var which implicitly control preeemption. Drop
the wrapper function that no longer serves any purpose.
drivers/dma/ioat/prep.c | 29 +++++++++++++++++++++++++----
1 file changed, 25 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/ioat/prep.c b/drivers/dma/ioat/prep.c
index 6bb4a13..0bd05c8 100644
--- a/drivers/dma/ioat/prep.c
+++ b/drivers/dma/ioat/prep.c
@@ -21,6 +21,7 @@
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/prefetch.h>
+#include <linux/percpu.h>
#include "../dmaengine.h"
#include "registers.h"
#include "hw.h"
@@ -655,13 +656,22 @@ ioat_prep_pq_val(struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
flags);
}
+/*
+ * The scf scratch buffer is too large for an automatic variable, and
+ * we don't want to take the performance hit for dynamic allocation.
+ * Therefore, define per CPU buffers and use get_cpu_var()/put_cpu_var()
+ * to control preemption while the buffer is in use.
+ */
+static DEFINE_PER_CPU(unsigned char [MAX_SCF], ioat_scf);
+
struct dma_async_tx_descriptor *
ioat_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src,
unsigned int src_cnt, size_t len, unsigned long flags)
{
- unsigned char scf[MAX_SCF];
+ unsigned char *scf;
dma_addr_t pq[2];
struct ioatdma_chan *ioat_chan = to_ioat_chan(chan);
+ struct dma_async_tx_descriptor *desc;
if (test_bit(IOAT_CHAN_DOWN, &ioat_chan->state))
return NULL;
@@ -669,16 +679,21 @@ ioat_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src,
if (src_cnt > MAX_SCF)
return NULL;
+ scf = get_cpu_var(ioat_scf);
+
memset(scf, 0, src_cnt);
pq[0] = dst;
flags |= DMA_PREP_PQ_DISABLE_Q;
pq[1] = dst; /* specify valid address for disabled result */
- return src_cnt_flags(src_cnt, flags) > 8 ?
+ desc = src_cnt_flags(src_cnt, flags) > 8 ?
__ioat_prep_pq16_lock(chan, NULL, pq, src, src_cnt, scf, len,
flags) :
__ioat_prep_pq_lock(chan, NULL, pq, src, src_cnt, scf, len,
flags);
+
+ put_cpu_var(ioat_scf);
+ return desc;
}
struct dma_async_tx_descriptor *
@@ -686,9 +701,10 @@ ioat_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src,
unsigned int src_cnt, size_t len,
enum sum_check_flags *result, unsigned long flags)
{
- unsigned char scf[MAX_SCF];
+ unsigned char *scf;
dma_addr_t pq[2];
struct ioatdma_chan *ioat_chan = to_ioat_chan(chan);
+ struct dma_async_tx_descriptor *desc;
if (test_bit(IOAT_CHAN_DOWN, &ioat_chan->state))
return NULL;
@@ -696,6 +712,8 @@ ioat_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src,
if (src_cnt > MAX_SCF)
return NULL;
+ scf = get_cpu_var(ioat_scf);
+
/* the cleanup routine only sets bits on validate failure, it
* does not clear bits on validate success... so clear it here
*/
@@ -706,11 +724,14 @@ ioat_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src,
flags |= DMA_PREP_PQ_DISABLE_Q;
pq[1] = pq[0]; /* specify valid address for disabled result */
- return src_cnt_flags(src_cnt, flags) > 8 ?
+ desc = src_cnt_flags(src_cnt, flags) > 8 ?
__ioat_prep_pq16_lock(chan, result, pq, &src[1], src_cnt - 1,
scf, len, flags) :
__ioat_prep_pq_lock(chan, result, pq, &src[1], src_cnt - 1,
scf, len, flags);
+
+ put_cpu_var(ioat_scf);
+ return desc;
}
struct dma_async_tx_descriptor *
--
1.9.1
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