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Message-id: <5694B947.7040207@samsung.com>
Date: Tue, 12 Jan 2016 17:28:55 +0900
From: Krzysztof Kozlowski <k.kozlowski@...sung.com>
To: Andi Shyti <andi.shyti@...sung.com>,
linux-arm-kernel@...ts.infradead.org
Cc: linux@....linux.org.uk, tony@...mide.com, robh@...nel.org,
tglx@...utronix.de, olof@...om.net, tomasz.figa@...il.com,
jiang.liu@...ux.intel.com, yamada.masahiro@...ionext.com,
linux-kernel@...r.kernel.org, m.szyprowski@...sung.com,
andi@...zian.org
Subject: Re: [PATCH v2] arm: irq: l2c: do not print error in case of missing
l2c from dtb
On 12.01.2016 16:24, Andi Shyti wrote:
> In some architectures the L2 cache controller is integrated in the
> processor's block itself and it doesn't use any external cache
> controller. This means that an entry in the board's dtb related
> to the l2c is not necessary.
>
> Distinguish between error codes and print just an information in
> case of -ENODEV.
>
> This patch converts the following error message:
>
> L2C: failed to init: -19
>
> to the following info:
>
> L2C: no controller entry found in the dtb
>
> on boards like odroid-xu4, cortex A7/A15, which don't have
> external cache controller.
>
> Signed-off-by: Andi Shyti <andi.shyti@...sung.com>
> Reported-by: Krzysztof Kozlowski <k.kozlowski@...sung.com>
> ---
>
> Thanks Joe,
>
> makes sense!
>
> Andi
>
> arch/arm/kernel/irq.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Works (Odroid XU3, Exynos5422) and looks good for me:
Tested-by: Krzysztof Kozlowski <k.kozlowski@...sung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@...sung.com>
Best regards,
Krzysztof
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