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Message-ID: <20160113150656.GD2588@ulmo>
Date:	Wed, 13 Jan 2016 16:06:56 +0100
From:	Thierry Reding <thierry.reding@...il.com>
To:	Wei Ni <wni@...dia.com>
Cc:	rui.zhang@...el.com, mikko.perttunen@...si.fi,
	swarren@...dotorg.org, linux-tegra@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH V1 04/10] thermal: tegra: add T210-specific SOC_THERM
 driver
On Wed, Jan 13, 2016 at 03:58:43PM +0800, Wei Ni wrote:
[...]
> diff --git a/drivers/thermal/tegra/tegra_soctherm_fuse.c b/drivers/thermal/tegra/tegra_soctherm_fuse.c
> index 7c608698f1ae..22f402240672 100644
> --- a/drivers/thermal/tegra/tegra_soctherm_fuse.c
> +++ b/drivers/thermal/tegra/tegra_soctherm_fuse.c
> @@ -28,6 +28,17 @@
>  #define FUSE_TSENSOR_COMMON			0x180
>  
>  /*
> + * T210: Layout of bits in FUSE_TSENSOR_COMMON:
> + *    3                   2                   1                   0
> + *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
> + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
> + * |       BASE_FT       |      BASE_CP      | SHFT_FT | SHIFT_CP  |
> + * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
> + *
> + * In chips prior to T210, this fuse was incorrectly sized as 26 bits,
> + * and didn't hold SHIFT_CP in [31:26]. Therefore these missing six bits
The above diagram aso doesn't contain SHIFT_CP in bits [31:26] but
rather in bits [5:0]. Which one is correct: the text or the diagram?
Thierry
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