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Message-ID: <5696A002.6050402@ti.com>
Date:	Wed, 13 Jan 2016 13:05:38 -0600
From:	Nishanth Menon <nm@...com>
To:	"H. Nikolaus Schaller" <hns@...delico.com>
CC:	Tony Lindgren <tony@...mide.com>,
	Grygorii Strashko <grygorii.strashko@...com>,
	Laxman Dewangan <ldewangan@...dia.com>,
	Benoît Cousson <bcousson@...libre.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Russell King <linux@....linux.org.uk>,
	linux-omap <linux-omap@...r.kernel.org>,
	<devicetree@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>,
	Marek Belisko <marek@...delico.com>,
	Gražvydas Ignotas <notasas@...il.com>,
	Keerthy <j-keerthy@...com>
Subject: Re: [PATCH 1/3] ARM: dts: omap5-board-common: enable rtc and charging
 of backup battery

On 01/13/2016 12:44 PM, H. Nikolaus Schaller wrote:
> 
> Am 13.01.2016 um 19:31 schrieb Nishanth Menon <nm@...com>:
> 
>> On 01/13/2016 12:08 PM, H. Nikolaus Schaller wrote:
>> [...]
>>
>>>> OK. So are we sure the TWL driver will never have to toggle this pin?
>>>
>>> After studying the Palmas TRM it appears that this pin just should be "high"
>>> to be able to write to RTC and some scratchpad register. If the Palmas OTP
>>> is programmed to use gpio7 as msecure input.
>>
>> Thanks for digging it up. we dont use the scratchpad, but in some cases
>> where SoC cold reset is involved, those registers may store additional
>> information.
> 
> I remember a similar thing from omap3-twl4030 where the boot source is stored
> so that a warm reboot searches there. But I don#t know if the OMPAP5 Boot ROM
> is using that.
> 

I believe that nonsense of OMAP ROM accessing PMIC stopped with OMAP3. I
dont believe OMAP4 or any later generation processors does any PMIC
access anymore - they instead make assumptions about specific voltage
levels they will work on (So called OPP_BOOT) instead of assuming
specific PMIC they will work with..

>>> Since the scratchpad is not used we can permanently enable msecure. Which
>>> means that we must somehow get the driving output to be "1".
>>>
>>> This can be either done by
>>> * a gpio with pull-up - switched to input mode as I proposed, or
>>
>> I think you intended to suggest to do a mux to gpio with just pinmux
>> pull?
> 
> Yes.
> 
>> The internal pull on padconf is very weak
>> - for typical needs like
>> these, it is rather suggested to stick with real GPIO drive to prevent
>> conditions like noise interference(for example).
> 
> 
> well, on OMAP5 pull up/down are astonishingly strong :)
> 100-250µA. Which translated roughly to 7 .. 18 kOhm @ 1.8V logic.
> So a noise source must be coupled by an impedance in the 1 kOhm range.
> This is quite rare. So I would not worry about that.
> 

Interesting. I did not know that, and have'nt dug at people to confirm
that either :).

An internal feedback I got some time back on AM57 (not OMAP5) - context
was that we were discussing if an external pull up resistor was needed
for a GPIO button:
"Internal pull-ups are relatively weak (ranging to 100kOhm or higher)
and are good for avoiding higher leakage due to floating input level,
and may not be sufficient for valid logic 1/0 depending on what else is
connected on the board.  If a signal must absolutely be pulled to a
valid logic 1 or 0 for system functionality, then an external pull
should be used."

Anyways... will let Tony decide where he wants to go on this..

-- 
Regards,
Nishanth Menon

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