linux-kernel - Re: [PATCH V3 00/21] MMCONFIG refactoring and support for ARM64 PCI hostbridge init based on ACPI

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Message-ID: <1452792723.28109.31.camel@redhat.com>
Date:	Thu, 14 Jan 2016 12:32:03 -0500
From:	Mark Salter <msalter@...hat.com>
To:	Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc:	Sinan Kaya <okaya@...eaurora.org>,
	Tomasz Nowicki <tn@...ihalf.com>, bhelgaas@...gle.com,
	arnd@...db.de, will.deacon@....com, catalin.marinas@....com,
	rjw@...ysocki.net, hanjun.guo@...aro.org,
	jiang.liu@...ux.intel.com, Stefano.Stabellini@...citrix.com,
	robert.richter@...iumnetworks.com, mw@...ihalf.com,
	Liviu.Dudau@....com, ddaney@...iumnetworks.com, tglx@...utronix.de,
	wangyijing@...wei.com, Suravee.Suthikulpanit@....com,
	linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-acpi@...r.kernel.org, linux-kernel@...r.kernel.org,
	linaro-acpi@...ts.linaro.org, jchandra@...adcom.com, jcm@...hat.com
Subject: Re: [PATCH V3 00/21] MMCONFIG refactoring and support for ARM64 PCI
 hostbridge init based on ACPI

On Thu, 2016-01-14 at 17:07 +0000, Lorenzo Pieralisi wrote:
> On Thu, Jan 14, 2016 at 11:38:44AM -0500, Mark Salter wrote:
> 
> [...]
> 
> > You would lose that bet. AddressMinimum/Maximum describe the
> > PCI bus addresses.
> 
> In the mainline DT (APM Mustang), the CPU physical address corresponding
> to IO space is 0xe010000000, PCI bus address is 0x0.
> 
> >                 QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
> >                     0x0000000000000000, // Granularity
> >                     0x0000000010000000, // Range Minimum
> 
> 
> >                     0x000000001000FFFF, // Range Maximum
> >                     0x000000E000000000, // Translation Offset
> 
> See above, I will get the APM specifications to countercheck.

The spec won't help other than to verify that the PCIe bridge supports a 32-bit
IO address space. The firmware sets the PCI bus base @ 0x10000000 with a CPU base
address for that window @ 0xe010000000. The pci-xgene.c driver sets the PCI
bus IO base address to whatever DT tells it too. For ACPI, we have to use whatever
the firmware set it to and described it in the ACPI table.

When I looked at this a while back, neither ACPI nor PCI had anything which
disallowed 32-bit IO space on the PCI bus. The 16-bit limit is an x86 limit
in the instruction set.

> 
> I agree with you we have to verify if this IO space limitation is
> real or it is just an x86ism, in which case we remove that check.
> 
> Lorenzo
> >                     0x0000000000010000, // Length
> >                     ,, , TypeStatic)
> 
> > 
> > 
> > > Jiang's patch:
> > > 
> > > https://lkml.org/lkml/2015/12/16/249
> > > 
> > > parses the IO descriptors and stores the AddressMinimum, AddressMaximum
> > > in the IO resource (with AddressTranslation as offset which must be the
> > > *CPU* physical address mapping IO), from the log above it seems to me in
> > > AddressMinimum APM specifies the *CPU* physical address generating IO
> > > cycles.
> > > 
> > > All in all, I was right to fear this would happen, and I already
> > > raised the point within the ACPI spec working group, ACPI IO
> > > descriptors specification is ambiguous and we must agree on how
> > > they have to be specified once for all.
> > > 
> > > Lorenzo
> >