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Message-ID: <20160114225359.GL19941@pd.tnic>
Date:	Thu, 14 Jan 2016 23:53:59 +0100
From:	Borislav Petkov <bp@...en8.de>
To:	Aravind Gopalakrishnan <aravind.gopalakrishnan@....com>
Cc:	tony.luck@...el.com, tglx@...utronix.de, mingo@...hat.com,
	hpa@...or.com, x86@...nel.org, linux-edac@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per
 bank

On Thu, Jan 14, 2016 at 04:48:22PM -0600, Aravind Gopalakrishnan wrote:
> True. But that BlkPtr logic also will undergo changes as it's interpretation
> for future processors is different.

But there still must be a bit there which says "this register is valid",
like MCi_MISC[63].

And so I'd very much prefer checking a bit (or bits) instead of relying
on defines.

> We are guaranteed to have all the MISC registers (all 5 of them) going
> forward.

Guarantees are worth nothing.

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.

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