linux-kernel - Re: [Patch V2 6/9] clk: tegra210: fix pllx dyn step calculation

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Message-ID: <20160125124708.GL20452@ulmo.nvidia.com>
Date:	Mon, 25 Jan 2016 13:47:08 +0100
From:	Thierry Reding <thierry.reding@...il.com>
To:	Rhyland Klein <rklein@...dia.com>
Cc:	Peter De Schrijver <pdeschrijver@...dia.com>,
	Mike Turquette <mturquette@...libre.com>,
	Stephen Warren <swarren@...dotorg.org>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Alexandre Courbot <gnurou@...il.com>,
	linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [Patch V2 6/9] clk: tegra210: fix pllx dyn step calculation

On Thu, Jan 14, 2016 at 02:24:35PM -0500, Rhyland Klein wrote:
> The logic for calculating the input rate used when figuring out
> the proper dynamic steps for pllx was incorrect. It is supposed to
> be calculated using parent_rate / m but it was just using the parent
> rate directly, therefore using the wrong step values.
> 
> Signed-off-by: Rhyland Klein <rklein@...dia.com>
> ---
>  drivers/clk/tegra/clk-tegra210.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)

Applied, thanks.

Thierry

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