linux-kernel - Re: [Patch V2 8/9] clk: tegra: pll: Fix typos around clearing plle bits during enable

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Message-ID: <20160125124723.GM20452@ulmo.nvidia.com>
Date:	Mon, 25 Jan 2016 13:47:23 +0100
From:	Thierry Reding <thierry.reding@...il.com>
To:	Rhyland Klein <rklein@...dia.com>
Cc:	Peter De Schrijver <pdeschrijver@...dia.com>,
	Mike Turquette <mturquette@...libre.com>,
	Stephen Warren <swarren@...dotorg.org>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Alexandre Courbot <gnurou@...il.com>,
	linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [Patch V2 8/9] clk: tegra: pll: Fix typos around clearing plle
 bits during enable

On Thu, Jan 14, 2016 at 02:24:37PM -0500, Rhyland Klein wrote:
> While enabling PLLE on both Tegra114 and Tegra210, we should be clearing
> PLLE_MISC_VREG_BG_CTRL_MASK and PLLE_MISC_VREG_CTRL_MASK not setting
> them. This patch fixes both places where we incorrectly set instead
> of cleared those bits.
> 
> Signed-off-by: Rhyland Klein <rklein@...dia.com>
> ---
>  drivers/clk/tegra/clk-pll.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Applied, thanks.

Thierry

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