[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <2817924.61jZWIvqjt@wuerfel>
Date: Mon, 08 Feb 2016 17:46:36 +0100
From: Arnd Bergmann <arnd@...db.de>
To: Joao Pinto <Joao.Pinto@...opsys.com>
Cc: Bjorn Helgaas <helgaas@...nel.org>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, CARLOS.PALMINHA@...opsys.com
Subject: Re: [PATCH] link up validation moved to pcie-designware
On Monday 08 February 2016 16:43:33 Joao Pinto wrote:
> Hi,
> Ok, so what should be the retries and waiting time in your opinion?
> The most typical is:
>
> retries: 10
> delay: 100ms (usleep_range (90000, 100000))
>
> These values should be ok?
>
> I am already testing a full pcie-designware platform driver.
>
>
You are the one with the datasheet, not me. ;-)
Arnd
Powered by blists - more mailing lists