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Message-ID: <CAKv+Gu_sPq9wesOpEREyopVddpVW2P7m8YCDHHcBHkLk-kH+ew@mail.gmail.com>
Date:	Tue, 9 Feb 2016 17:52:34 +0100
From:	Ard Biesheuvel <ard.biesheuvel@...aro.org>
To:	Andy Lutomirski <luto@...capital.net>
Cc:	Matt Fleming <matt@...eblueprint.co.uk>,
	"H. Peter Anvin" <hpa@...or.com>,
	"linux-efi@...r.kernel.org" <linux-efi@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Sai Praneeth Prakhya <sai.praneeth.prakhya@...el.com>,
	Ingo Molnar <mingo@...nel.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>
Subject: Re: [PATCH] efi: runtime-wrappers: run UEFI Runtime Services with
 interrupts enabled

On 8 February 2016 at 20:37, Andy Lutomirski <luto@...capital.net> wrote:
> On Feb 4, 2016 5:58 AM, "Ard Biesheuvel" <ard.biesheuvel@...aro.org> wrote:
>>
>> OK, since Sai has confirmed that Windows leaves interrupts enabled when
>> calling the EFI variable store related runtime services, we should be able
>> to do the same for Linux, or at least be slightly more confident that we
>> won't have to back out this change later.
>
> Could this use a mutex instead of a spinlock?
>

When I first started working on this code, I proposed using a mutex,
but at the time, we still had the efi-pstore case to worry about
http://article.gmane.org/gmane.linux.kernel.efi/4112

In the mean time, we have modified the efi-pstore code so it simply
gives up when the EFI varstore is busy, and we also got rid of the NMI
special case where locks are ignored. In summary, it sounds to me that
moving to a mutex should be feasible, but I am only really familiar
with the ARM side of the implementation, which is far less complex
than the x86 side, so Matt should confirm.

@Matt?

> Can someone with a mixed mode setup read a variable in a loop and make
> sure it doesn't crash and burn?  It should work fine, but explicit
> testing would be nice.  (It's interesting mainly because doing a mixed
> mode call with interrupts on can result in a non-IST CPL0 to CPL0
> exception delivery, which won't result in a stack switch.  This could
> easily trigger a stack overflow, logic bug, microcode bug, or
> as-yet-unknown CPU "feature".
>
> Hmm.  We should also audit the mixed mode entry code to make sure that
> the high bits of RSP are explicitly clear before switching into compat
> mode.  If I had to make a guess about how CPUs behave, I'd guess
> pessimistically: Intel CPUs clear the high bits of RSP when switching
> into long mode due to interrupt delivery, and AMD CPUs leave them set
> just to mess with us.
>
> Also, a WARN_ON(in_interrupt()) somewhere might be a good sanity check.
>

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