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Message-ID: <20160210092822.GA1052@arm.com>
Date: Wed, 10 Feb 2016 09:28:23 +0000
From: Will Deacon <will.deacon@....com>
To: David Daney <ddaney.cavm@...il.com>
Cc: linux-arm-kernel@...ts.infradead.org,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Marc Zyngier <marc.zyngier@....com>,
linux-kernel@...r.kernel.org, Andrew Pinski <apinski@...ium.com>,
David Daney <david.daney@...ium.com>
Subject: Re: [PATCH] arm64: Add workaround for Cavium erratum 27456
On Tue, Feb 09, 2016 at 11:29:16AM -0800, David Daney wrote:
> From: Andrew Pinski <apinski@...ium.com>
>
> On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI
> instructions may cause the icache to become invalid if it contains
> data for a non-current ASID.
>
> This patch implements the workaround (which flushes the local icache
> when switching the mm) by using code patching.
So, to be clear, is this "just" a performance problem as opposed to a
correctness issue? If so, do you have any numbers with and without this
change?
Will
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