linux-kernel - Re: [PATCHv10 1/4] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support

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Message-ID: <20160211113554.GB5565@pd.tnic>
Date:	Thu, 11 Feb 2016 12:35:54 +0100
From:	Borislav Petkov <bp@...en8.de>
To:	tthayer@...nsource.altera.com
Cc:	dougthompson@...ssion.com, m.chehab@...sung.com,
	robh+dt@...nel.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	linux@....linux.org.uk, dinguyen@...nsource.altera.com,
	grant.likely@...aro.org, devicetree@...r.kernel.org,
	linux-doc@...r.kernel.org, linux-edac@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	tthayer.linux@...il.com
Subject: Re: [PATCHv10 1/4] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC
 Support

On Wed, Feb 10, 2016 at 01:26:21PM -0600, tthayer@...nsource.altera.com wrote:
> From: Thor Thayer <tthayer@...nsource.altera.com>
> 
> Adding L2 Cache and On-Chip RAM EDAC support for the
> Altera SoCs using the EDAC device  model. The SDRAM
> controller is using the Memory Controller model.
> 
> Each type of ECC is individually configurable.

All 4 applied, thanks.

-- 
Regards/Gruss,
    Boris.

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